Asymmetrical Double Gate: significant improvement in ultra-scaled sol mosfet
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Abstract
Fully-depletion operation is mandatory requirement for ultra-scaled devices (Le. < 45 nm technology) which only can be achieved either multi-gate (Le. FinFET) or thin body Silicon-on-Insulator (SOl). Thin body SOl offers another interesting feature compared to any other
technologies i.e. back-gate biasing. In this invention, we utilize asymmetrical contact from the top which provide improved performance and better controlled of short-channel effects in thin body and thin buried oxide of SOl MOSFETs.