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    A simple oxidation technique for quantum dot dimension shrinkage and tunnel barriers generation

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    Date
    2007-05
    Author
    Madnarski Sutikno
    Uda, Hashim, Prof. Dr.
    Zul Azhar, Zahid Jamal, Prof. Dr.
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    Abstract
    The tunnel barriers generation and the quantum dot size shrinkage play a significant role in single-electron transistor (SET) fabrication. Because the numerically etch indicators were not found, the technical indicators, high contrast surface and high smoothness surface were used to optimize the etch process. Si nanostructures oxidation using either oxidation furnace or rapid thermal processing (RTP) equipment can result in silicon dioxide (SiO2)-embedded-Si. In this research, we compare the furnace-oxidized-Si nanostructures with the RTP-oxidized-Si nanostructures. The oxidation rate of Si nanostructures using a furnace is 0.36 nm/s, while the oxidation rate of Si nanostructures using RTP is 2.16 nm/s.
    URI
    http://www.sciencedirect.com/science/journal/00262692
    http://dspace.unimap.edu.my/123456789/6796
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    • School of Microelectronic Engineering (Articles) [183]
    • Zul Azhar Zahid Jamal, Dato' Prof. Dr. [47]
    • Uda Hashim, Prof. Ts. Dr. [243]

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