dc.contributor.author | Sohiful Anuar, Zainol Murad | |
dc.contributor.author | Pokharel, R. K. | |
dc.contributor.author | Kanaya, H. | |
dc.contributor.author | Yoshida, K. | |
dc.date.accessioned | 2010-08-02T02:04:12Z | |
dc.date.available | 2010-08-02T02:04:12Z | |
dc.date.issued | 2010-01-11 | |
dc.identifier.citation | p. 25-28 | en_US |
dc.identifier.isbn | 978-142445458-7 | |
dc.identifier.uri | http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5422842&tag=1 | |
dc.identifier.uri | http://dspace.unimap.edu.my/123456789/8424 | |
dc.description | Link to publisher's homepage at http://ieeexplore.ieee.org/ | en_US |
dc.description.abstract | This paper describes the design of a 2.4-GHz CMOS Class E single-ended power amplifier (PA)
for wireless applications in TSMC 0.18-μm CMOS technology. The Class E PA proposed in this
paper realizes all inductors with bondwires for the higher quality factor to increase PA
performance and to reduce chip size. The single-ended topology is employed because most
existing components designed to be driven by PAs are single-ended. The cascode topology with
a self-biasing technique is used to prevent device stress and to decrease the requirement for
additional bond pads. The measurement results indicate that the PA delivers 19.2 dBm output
power and 27.8% power added efficiency with 3.3-V power supply into a 50 5 load. The chip
area is 0.37 mm2. | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE | en_US |
dc.relation.ispartofseries | Proceedings of the Silicon Monolithic Integrated Circuits in RF Systems (SiRF) 2010 | en_US |
dc.subject | Bondwires | en_US |
dc.subject | Class E | en_US |
dc.subject | Output power | en_US |
dc.subject | Power added efficiency | en_US |
dc.title | A 2.4 GHz 0.18-μm CMOS class E single-ended power amplifier without spiral inductors | en_US |
dc.type | Working Paper | en_US |