| dc.contributor.author | Arjuna, Marzuki | |
| dc.contributor.author | Ali Yeon, Md. Shakaff, Prof. Dr. | |
| dc.contributor.author | Zaliman, Sauli, Prof. Madya | |
| dc.date.accessioned | 2010-08-13T05:18:04Z | |
| dc.date.available | 2010-08-13T05:18:04Z | |
| dc.date.issued | 2009-11-01 | |
| dc.identifier.citation | IETE Journal of Research, vol. 55 (6), 2009, p. 309-314 | en_US |
| dc.identifier.issn | 0377-2063 | |
| dc.identifier.uri | http://www.jr.ietejournals.org/text.asp?2009/55/6/309/59172 | |
| dc.identifier.uri | http://dspace.unimap.edu.my/123456789/8648 | |
| dc.description | Link to publisher's homepage at http://www.jr.ietejournals.org/ | en_US |
| dc.description.abstract | This paper describes how a broadband, 1.5 V, 0.85-13.35 GHz low noise amplifier in 0.15 μm 85 GHz PHEMT process is synthesized to simultaneously meet multiple design specifications such as bandwidth, noise figure, power gain and power consumption. Power-constrained synthesis technique is used to design the broadband amplifier. The simulated peak S21 is 19.8 dB, maximum noise Figure is 2.5 dB, 3-dB bandwidth is 12.5 GHz and power consumption is 73.5 mW. The calculated Figure of merit (FOM) is better than many reported broadband low noise amplifier (LNA). | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | Institution of Electronics and Telecommunication Engineers (IETE) | en_US |
| dc.subject | Broadband amplifier | en_US |
| dc.subject | Integrated circuit | en_US |
| dc.subject | Monolithic microwave integrated circuit | en_US |
| dc.subject | Optimization | en_US |
| dc.subject | Power-constrained | en_US |
| dc.subject | Pseudomorphic high electron mobility transistor | en_US |
| dc.title | A 1.5 V, 0.85-13.35 GHZ MMIC low noise amplifier design using optimization technique | en_US |
| dc.type | Article | en_US |
