| dc.description.abstract | This VCO are designated using cascade technique and differential common-mode change. The measured are 4 stages at 2.0GHz with power dissipation 20mWatt. For this final year project,mentor grahics software has use for design n simulate the circuit of VCO. VCO have a specification to approach to design a schematic n layout. The specification are the fo=2.0GHz and the output of Ibias must have a double output than the Ibias/2 . Ibias 1mA. To fulfill the specification, the value of length (L) and width (W) at NMOS M≤1, M2, M5, M6, M9, M10, M14 , and M15 and the value of resistor has been change. For example, the differential pair as one stage of ring oscillator has been considering. M3 and M4 operate in the triode regions, each acting as a variable resistor controlled by Vbias . As Vbias become more positive, the on resistance of M3 and M4 increases, thus raising the time constant of the output and lowering. The output of VCO will go through to the input of the PMOS to get the oscillation at the output waveform. To start design of VCO resistor has been changes to form of PMOS transistor. Calculation for PMOS transistor can be act as a resistor has been complete. In summary, the negative feedback circuit has a loop gain that satisfies two condition; |H(jωo)| >= 1 and + < H(jωo) = 180°. The systems is then can be implemented in CMOS technologies which is called “Ring Oscillators”. To perform the design, the methods are using the mentor graphic software. This software provides design architecture software and IC design software. For testing and analyze circuit, design architecture can check all the parameter such as current, voltage and gain. Thus, actually for this designing the layout versus schematic (LVS) result is more important than design rule check (DRC) result. | en_US |
